1. Field of the Invention
The present invention relates to a processor structure, and more particularly, to a method and apparatus for accessing a memory according to a processor instruction in order to reduce memory access frequency when a processor accesses a stack memory in which a local variable is stored.
2. Description of the Related Art
A processor is hardware or an information provider (IP) executing algorithms for a specific application by reading an instruction stored in a storage medium such as a memory or a disk, performing a specific arithmetic or logic operation with respect to an operand according to operations encoded in that instruction, and storing the result thereof.
When the application algorithm is compiled by processor instructions, it is converted to a series of instructions. Here, global variables of the algorithm are stored in a main memory or a cache memory, while local variables of a function are stored in a stack.
A stack is a region of memory having a predetermined size and assigned to the main memory or the cache memory. Local variables of each function are only used in that function. When the function is completed, the local variables are no longer used. Accordingly, in order to store the local variables, the stack is employed. When the function is called, function depth is increased and the stack grows. When a function call is completed, the stack is also reduced proportionately to the number of local variables used in the function.
Meanwhile, as a result of analyzing an algorithm of a specific application which a processor is applied to, a considerable number of local variables in a function become accessed during the execution of the function. Also, the area where the local variables are actually stored is the stack in a memory area. While a function is called and completed, local variables of different functions are stored in the stack, thereby repeatedly performing memory access to the same stack.
Therefore, reviewing the distribution of energy consumption in the processor, a greater amount of energy is consumed in gaining access to the cache memory or the main memory than the energy consumed in the internal logic of the processor, thereby causing an increase in access frequency to the cache memory and the main memory.